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ACM Transactions on Design of Automated Electronic Systems
Run-time performance optimization of an FPGA-based deduction engine for SAT solvers
Andreas Dandalis, Viktor K. Prasanna
Journal Title: ACM Transactions on Design of Automated Electronic Systems
Date: 2002
Volume: 7
Issue: 4
p. 547 - 562
We have been looking for this document on the Web. We think we have found the following, freely available version(s) of it:
http://www.coreworks.pt/hipersat.pdf
For further information about this item go to:
http://doi.acm.org/10.1145/605440.605444
This data comes from
DBLP
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It was last updated on 2006-04-12