Aegean Workshop on Computing
1988
- Fast Parallel and Sequential Algorithms for Edge-Coloring Planar Graphsby: Marek Chrobak, Moti Yung
- Parallel Simulation and Test of VLSI Array Logicby: Pradip Bose
- Time Lower Bounds for Parallel Sorting on a Mesh-Connected Processor Arrayby: Yijie Han, Yoshihide Igarashi
- Subtree Isomorphism is in Random NCby: Phillip B. Gibbons, Richard M. Karp, Gary L. Miller, Danny Soroker
- All Graphs have Cycle Separators and Planar Directed Depth-First Search is in DNCby: Ming-Yang Kao
- Fast Self-Reduction Algorithms for Combinatorical Problems of VLSI-Designby: Michael R. Fellows, Michael A. Langston
- Computing a Perfect Matching in a Line Graphby: Joseph Naor
- Optimal Routing Algorithms for Mesh-Connected Processor Arraysby: Danny Krizanc, Sanguthevar Rajasekaran, Thanasis Tsantilas
- Simple Three-Layer Channel Routing Algorithmsby: Teofilo F. Gonzalez, Si-Qing Zheng
- Cubesort: An Optimal Sorting Algorithm for Feasible Parallel Computersby: Robert Cypher, Jorge L. C. Sanz
- GRAPH EMBEDDINGS 1988: Recent Breakthroughs, New Directionsby: Arnold L. Rosenberg
- Optimal Parallel Algorithms on Planar Graphsby: Torben Hagerup
- Channel Routing with Short Wiresby: Michael Kaufmann, Ioannis G. Tollis
- Weighted Distributed Match-Makingby: Evangelos Kranakis, Paul M. B. Vitányi
- Compaction on the Torusby: Kurt Mehlhorn, Wolfgang Rülling
- Optimal Parallel Algorithms for Expression Tree Evaluation and List Rankingby: Richard Cole, Uzi Vishkin
- A New Algorithm for Wiring Layoutsby: Ioannis G. Tollis
- A 4D Channel Router for a Two Layer Diagonal Modelby: Elena Lodi, Fabrizio Luccio, Linda Pagli
- Network Complexity of Sorting and Graph Problems and Simulating CRCW PRAMS by Interconnection Networksby: Alok Aggarwal, Ming-Deh A. Huang
- Optimal Parallel Evaluation of Tree-Structured Computations by Rakingby: S. Rao Kosaraju, Arthur L. Delcher
- Separation Pair Detectionby: Donald S. Fussell, Ramakrishna Thurimella
- Uniform Self-Stabilizing Ringsby: James E. Burns, Jan K. Pachl
- Efficient Parallel Triconnectivity in Logarithmic Timeby: Vijaya Ramachandran, Uzi Vishkin
- Embedding Grids into Hypercubesby: Saïd Bettayeb, Zevi Miller, Ivan Hal Sudborough
- A Correction Network for N-Sortersby: Manfred Schimmler, Christoph Starke
- Simulating Binary Trees on Hypercubesby: Burkhard Monien, Ivan Hal Sudborough
- On Some Languages in NCby: Oscar H. Ibarra, Tao Jiang, Bala Ravikumar, Jik H. Chang
- Scheduling Dags to Minimize Time and Communicationby: Foto N. Afrati, Christos H. Papadimitriou, George Papageorgiou
- Routing and Sorting on Mesh-Connected Arraysby: Manfred Kunde
- Embedding Rectangular Grids into Square Gridsby: John A. Ellis
- A Tradeoff between Information and Communication in Broadcast Protocolsby: Baruch Awerbuch, Oded Goldreich, David Peleg, Ronen Vainish
- Applying the Classification Theorem for Finite Simple Groups to Minimize Pin Count in Uniform Permutation Architecturesby: Larry Finkelstein, Daniel J. Kleitman, Frank Thomson Leighton
- Parallel Algorithms for Evaluating Sequences of Set-Manipulation Operationsby: Mikhail J. Atallah, Michael T. Goodrich, S. Rao Kosaraju
- Better Computing on the Anonymous Ringby: Hagit Attiya, Marc Snir
- On Finding Lowest Common Ancestors: Simplification and Parallelizationby: Baruch Schieber, Uzi Vishkin
- O(log(n)) Parallel Time Finite Field Inversionby: Bruce E. Litow, George I. Davida
- Regular Structures and Testing: RCC-Addersby: Bernd Becker, Uwe Sparmann
- Converting Affine Recurrence Equations to Quasi-Uniform Recurrence Equationsby: Yoav Yaacoby, Peter R. Cappello
- Deterministic Parallel List Rankingby: Richard J. Anderson, Gary L. Miller
- Efficient Reconfiguration of VLSI Arraysby: Bruno Codenotti, Roberto Tamassia
- Universal Hashing in VLSIby: Martin Fürer
- A Scheduling Problem Arising From Loop Parallelization on MIMD Machinesby: Richard J. Anderson, Ashfaq A. Munshi, Barbara Simons
- Input Sensitive VLSI Layouts for Graphs of Arbitrary Degreeby: Deepak D. Sherlekar, Joseph JáJá
- Families of Consensus Algorithmsby: Amotz Bar-Noy, Danny Dolev
- Analysis of a Distributed Scheduler for Communication Networksby: Yossi Malka, Shlomo Moran, Shmuel Zaks
- The Complexity of Selection Resolution, Conflict Resolution and Maximum Finding on Multiple Access Channelsby: Charles U. Martel, Thomas P. Vayda
- Efficient Parallel Evaluation of Straight-line Code and Arithmetric Circuitsby: Gary L. Miller, Vijaya Ramachandran, Erich Kaltofen
- Combinatorial Static CMOD Networks (Extended Summary)by: Janusz A. Brzozowski, Michael Yoeli
- Parallel Ear Decomposition Search (EDS) and St-Numbering in Graphs (Extended Abstract)by: Yael Maon, Baruch Schieber, Uzi Vishkin
- A High-Performance Single-Chip VLSI Signal Processor Architectureby: Nick Kanopoulos, Peter N. Marinos
- A Logarithmic Boolean Time Algorithm for Parallel Polynomial Divisionby: Dario Bini, Victor Y. Pan
- Fast and Efficient Parallel Linear Programming and Linear Least Squares Computationsby: Victor Y. Pan, John H. Reif
- On the Connection Between Hexagonal and Unidirectional Rectangular Systolic Arraysby: Günter Rote
- Diogenes, Circa 1986by: Arnold L. Rosenberg
- A Unifying Framework for Systolic Designsby: Concettina Guerra
- VLSI Algorithms and Pipelined Architectures for Solving Structured Linear Systemby: I-Chang Jou, Yu Hen Hu, T. M. Parng
- A Generalized Topological Sorting Problemby: Torben Hagerup, Wolfgang Rülling
- Optimal Tradeoffs for Addition on Systolic Arrays (Extended Abstract)by: Alok Aggarwal, S. Rao Kosaraju
- A Comparative Study of Concurrency Control Methods in B-Treesby: Alexandros Biliris
- Efficient Modular Design of TSC Checkers for M-out-of-2M Codesby: Antonis M. Paschalis, Dimitris Nikolos, Constantine Halatsis
- Linear and Book Embeddings of Graphsby: Mihalis Yannakakis
- On the Time Required to Sum n Semigroup Elements on a Parallel Machine with Simultaneous Writesby: Ian Parberry
- Lower Bounds for Sorting on Mesh-Connected Architecturesby: Manfred Kunde
- Two Processor Scheduling is in NCby: David P. Helmbold, Ernst W. Mayr
- Breaking Symmetry in Synchronous Networksby: Greg N. Frederickson, Nicola Santoro
- Some New Results on a Restricted Channel Routing Problemby: Elena Lodi, Linda Pagli
- A Polynomial Algorithm for Recognizing Samll Cutwidth in Hypergraphsby: Zevi Miller, Ivan Hal Sudborough
- Digital Filtering in VLSIby: Gianfranco Bilardi, Franco P. Preparata
- A Polynomial Algorithm for Recognizing Images of Polyhedraby: Lefteris M. Kirousis
- AT2-Optimal Galois Field Multiplier for VLSIby: Martin Fürer, Kurt Mehlhorn
- Exploiting Hierarchy in VLSI Designby: Thomas Lengauer
- Generalized River Routing - Algorithms and Performance Bounds (Extended Abstract)by: Jean R. S. Blair, Errol L. Lloyd
- Nonsequentail Computation and Laws of Natureby: Paul M. B. Vitányi
- Linear Algorithms For Two CMOS Layout Problemsby: Rolf Müller, Thomas Lengauer
- Parallel Tree Techniques and Code Optimizationby: Eliezer Dekel, Simeon C. Ntafos, Shietung Peng
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